#ifndef OPCODE_H
#define OPCODE_H

// ==============================
// Opcode definitions (SIC/XE)
// ==============================
#define ADD     0x18
#define ADDF    0x58
#define ADDR    0x90
#define AND     0x40
#define CLEAR   0xB4
#define COMP    0x28
#define COMPF   0x88
#define COMPR   0xA0
#define DIV     0x24
#define DIVF    0x64
#define DIVR    0x9C
#define FIX     0xC4
#define FLOAT   0xC0
#define HIO     0xF4
#define J       0x3C
#define JEQ     0x30
#define JGT     0x34
#define JLT     0x38
#define JSUB    0x48
#define LDA     0x00
#define LDB     0x68
#define LDCH    0x50
#define LDF     0x70
#define LDL     0x08
#define LDS     0x6C
#define LDT     0x74
#define LDX     0x04
#define LPS     0xD0
#define MUL     0x20
#define MULF    0x60
#define MULR    0x98
#define NORM    0xC8
#define OR      0x44
#define RD      0xD8
#define RMO     0xAC
#define RSUB    0x4C
#define SHIFTL  0xA4
#define SHIFTR  0xA8
#define SIO     0xF0
#define SSK     0xEC
#define STA     0x0C
#define STB     0x78
#define STCH    0x54
#define STF     0x80
#define STI     0xD4
#define STL     0x14
#define STS     0x7C
#define STSW    0xE8
#define STT     0x84
#define STX     0x10
#define SUB     0x1C
#define SUBF    0x5C
#define SUBR    0x94
#define SVC     0xB0
#define TD      0xE0
#define TIO     0xF8
#define TIX     0x2C
#define TIXR    0xB8
#define WD      0xDC



// SW register condition codes
constexpr int CC_LT   = 0x0;  // 00
constexpr int CC_EQ   = 0x1;  // 01
constexpr int CC_GT   = 0x2;  // 10
constexpr int CC_MASK = 0x3;  // mask for 2 bits



enum class InstructionType {
    TYPE1,
    TYPE2,
    TYPE3_4,
    INVALID
};

class Machine; // forward

// Store raw function pointer (void*) to allow different handler signatures
using RawHandler = void*;

struct InstructionInfo {
    const char* name;
    InstructionType type;
    RawHandler handler;
};

extern InstructionInfo instructions[];

// Initialize the instruction table
void loadInstructionSet();

#endif // OPCODE_H