added instruction functionality
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9 changed files with 754 additions and 170 deletions
38
simulator_SIC_XE/include/constants.h
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38
simulator_SIC_XE/include/constants.h
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@ -0,0 +1,38 @@
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#ifndef CONSTANTS_H
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#define CONSTANTS_H
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// ==============================
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// SIC/XE Architecture Constants
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// ==============================
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// Memory and system constants
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constexpr int MEMORY_SIZE = 65536;
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constexpr int NUM_DEVICES = 256;
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constexpr int WORD_SIZE = 24;
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constexpr int WORD_MASK = 0xFFFFFF;
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// SIC/XE floating point constants
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constexpr int SICF_BITS = 48;
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constexpr int SICF_FRAC_BITS = 40;
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constexpr int SICF_EXP_BITS = 7;
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constexpr int SICF_EXP_BIAS = 64;
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constexpr unsigned long long SICF_FRAC_MASK = (1ULL << SICF_FRAC_BITS) - 1;
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// SW register condition codes
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constexpr int CC_LT = 0x0; // 00
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constexpr int CC_EQ = 0x1; // 01
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constexpr int CC_GT = 0x2; // 10
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constexpr int CC_MASK = 0x3; // mask for 2 bits
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// Instruction format bit masks
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constexpr int TYPE3_4_SIC_MASK = 0xFC;
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constexpr int NI_MASK = 0x03; // mask for n and i bits
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constexpr int NI_SIC = 0x0;
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constexpr int BP_BASE_REL_MASK = 0b10;
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constexpr int BP_PC_REL_MASK = 0b01;
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constexpr int BP_DIRECT_MASK = 0b00;
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constexpr int BIT_E_MASK = 0x10; // mask for e bit in F4 and F3 instructions
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#endif // CONSTANTS_H
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@ -1,11 +1,17 @@
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#ifndef INSTRUCTIONS_H
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#define INSTRUCTIONS_H
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#include "opcode.h"
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#include "utils.h"
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class Machine; // forward declaration
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// Type 2 instruction handlers
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void addr_handler(Machine& m, int r1, int r2);
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void clear_handler(Machine& m, int r, int unused);
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void compr_handler(Machine& m, int r1, int r2);
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void divr_handler(Machine& m, int r1, int r2);
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void mulr_handler(Machine& m, int r1, int r2);
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void rmo_handler(Machine& m, int r1, int r2);
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@ -16,5 +22,49 @@ void svc_handler(Machine& m, int n, int unused);
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void tixr_handler(Machine& m, int r1, int unused);
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// Type 3/4 instruction handlers
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void add_handler(Machine& m, int ea, AddressingMode mode);
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void addf_handler(Machine& m, int ea, AddressingMode mode);
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void and_handler(Machine& m, int ea, AddressingMode mode);
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void comp_handler(Machine& m, int ea, AddressingMode mode);
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void compf_handler(Machine& m, int ea, AddressingMode mode);
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void div_handler(Machine& m, int ea, AddressingMode mode);
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void divf_handler(Machine& m, int ea, AddressingMode mode);
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void j_handler(Machine& m, int ea, AddressingMode mode);
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void jeq_handler(Machine& m, int ea, AddressingMode mode);
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void jgt_handler(Machine& m, int ea, AddressingMode mode);
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void jlt_handler(Machine& m, int ea, AddressingMode mode);
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void jsub_handler(Machine& m, int ea, AddressingMode mode);
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void lda_handler(Machine& m, int ea, AddressingMode mode);
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void ldb_handler(Machine& m, int ea, AddressingMode mode);
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void ldch_handler(Machine& m, int ea, AddressingMode mode);
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void ldf_handler(Machine& m, int ea, AddressingMode mode);
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void ldl_handler(Machine& m, int ea, AddressingMode mode);
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void lds_handler(Machine& m, int ea, AddressingMode mode);
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void ldt_handler(Machine& m, int ea, AddressingMode mode);
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void ldx_handler(Machine& m, int ea, AddressingMode mode);
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void lps_handler(Machine& m, int ea, AddressingMode mode);
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void mul_handler(Machine& m, int ea, AddressingMode mode);
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void mulf_handler(Machine& m, int ea, AddressingMode mode);
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void or_handler(Machine& m, int ea, AddressingMode mode);
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void rd_handler(Machine& m, int ea, AddressingMode mode);
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void rsub_handler(Machine& m, int ea, AddressingMode mode);
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void ssk_handler(Machine& m, int ea, AddressingMode mode);
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void sta_handler(Machine& m, int ea, AddressingMode mode);
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void stb_handler(Machine& m, int ea, AddressingMode mode);
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void stch_handler(Machine& m, int ea, AddressingMode mode);
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void stf_handler(Machine& m, int ea, AddressingMode mode);
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void sti_handler(Machine& m, int ea, AddressingMode mode);
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void stl_handler(Machine& m, int ea, AddressingMode mode);
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void sts_handler(Machine& m, int ea, AddressingMode mode);
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void stsw_handler(Machine& m, int ea, AddressingMode mode);
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void stt_handler(Machine& m, int ea, AddressingMode mode);
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void stx_handler(Machine& m, int ea, AddressingMode mode);
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void sub_handler(Machine& m, int ea, AddressingMode mode);
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void subf_handler(Machine& m, int ea, AddressingMode mode);
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void td_handler(Machine& m, int ea, AddressingMode mode);
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void tix_handler(Machine& m, int ea, AddressingMode mode);
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void wd_handler(Machine& m, int ea, AddressingMode mode);
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#endif // INSTRUCTIONS_H
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@ -4,18 +4,15 @@
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#include <string>
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#include <iostream>
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#include <vector>
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#include <memory>
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#include "constants.h"
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#include "device.h"
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#include "input_device.h"
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#include "output_device.h"
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#include "file_device.h"
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#include "opcode.h"
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#include <memory>
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#define MEMORY_SIZE 65536
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#define NUM_DEVICES 256
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#include "utils.h"
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using std::string;
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using std::cerr;
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@ -28,28 +25,29 @@ public:
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Machine();
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~Machine();
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// Accessor methods for registers
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int getA() const { return A; }
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void setA(int value) { A = value; }
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void setA(int value) { A = toSIC24(value); }
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int getB() const { return B; }
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void setB(int value) { B = value; }
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void setB(int value) { B = toSIC24(value); }
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int getX() const { return X; }
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void setX(int value) { X = value; }
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void setX(int value) { X = toSIC24(value); }
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int getL() const { return L; }
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void setL(int value) { L = value; }
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void setL(int value) { L = toSIC24(value); }
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int getS() const { return S; }
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void setS(int value) { S = value; }
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void setS(int value) { S = toSIC24(value); }
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int getT() const { return T; }
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void setT(int value) { T = value; }
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void setT(int value) { T = toSIC24(value); }
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// PC is an address → don't mask to 24 unless you want 24-bit addressing
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int getPC() const { return PC; }
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void setPC(int value) { PC = value; }
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// status word: keep as-is
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int getSW() const { return SW; }
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void setSW(int value) { SW = value; }
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@ -83,7 +81,7 @@ public:
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bool execF1(int opcode);
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bool execF2(int opcode, int operand);
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bool execSICF3F4(int opcode, int ni, int operand);
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bool execSICF3F4(int opcode, int ni, int x, int b, int p, int e, int operand);
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// error handling methods
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void notImplemented(string mnemonic);
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Device fallbackDevice;
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};
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// Convert integer to 24-bit signed SIC representation
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inline int toSIC24(int value) {
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value &= 0xFFFFFF;
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if (value & 0x800000) {
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value -= 0x1000000;
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}
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return value;
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}
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inline int setCC(int sw, int cc) {
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sw &= ~CC_MASK;
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sw |= (cc & CC_MASK);
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return sw;
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}
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inline int sic_comp(int a, int b, int sw) {
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int sa = toSIC24(a);
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int sb = toSIC24(b);
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int cc;
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if (sa < sb) {
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cc = CC_LT;
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} else if (sa == sb) {
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cc = CC_EQ;
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} else {
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cc = CC_GT;
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}
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return setCC(sw, cc);
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}
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inline int getCC(int sw) {
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return sw & CC_MASK;
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}
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#endif // MACHINE_H
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@ -1,6 +1,8 @@
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#ifndef OPCODE_H
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#define OPCODE_H
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#include "utils.h"
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// ==============================
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// Opcode definitions (SIC/XE)
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// ==============================
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#define WD 0xDC
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// SW register condition codes
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constexpr int CC_LT = 0x0; // 00
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constexpr int CC_EQ = 0x1; // 01
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constexpr int CC_GT = 0x2; // 10
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constexpr int CC_MASK = 0x3; // mask for 2 bits
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enum class InstructionType {
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TYPE1,
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TYPE2,
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80
simulator_SIC_XE/include/utils.h
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80
simulator_SIC_XE/include/utils.h
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#ifndef UTILS_H
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#define UTILS_H
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#include "constants.h"
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// ==============================
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// SIC/XE Utility Functions
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// ==============================
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// Instruction bit extraction utilities
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inline int getXBit(int b2) {
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return (b2 & 0x80) ? 1 : 0;
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}
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inline int getBPBits(int b2) {
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return (b2 >> 5) & 0x03;
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}
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enum class AddressingMode {
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IMMEDIATE,
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INDIRECT,
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SIMPLE,
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SIC_DIRECT,
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INVALID
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};
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// Get addressing mode from ni bits
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AddressingMode getAddressingMode(int ni);
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// convert to signed 24-bit integer
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inline int toSIC24(int value) {
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value &= 0xFFFFFF;
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if (value & 0x800000) {
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value -= 0x1000000;
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}
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return value;
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}
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inline int setCC(int sw, int cc) {
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sw &= ~CC_MASK;
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sw |= (cc & CC_MASK);
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return sw;
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}
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inline int sic_comp(int a, int b, int sw) {
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int sa = toSIC24(a);
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int sb = toSIC24(b);
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int cc;
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if (sa < sb) {
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cc = CC_LT;
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} else if (sa == sb) {
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cc = CC_EQ;
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} else {
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cc = CC_GT;
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}
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return setCC(sw, cc);
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}
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inline int sic_comp(double a, double b, int sw) {
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int cc;
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if (a < b) {
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cc = CC_LT;
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} else if (a == b) {
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cc = CC_EQ;
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} else {
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cc = CC_GT;
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}
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return setCC(sw, cc);
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}
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inline int getCC(int sw) {
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return sw & CC_MASK;
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}
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#endif // UTILS_H
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