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zanostro 2025-11-13 22:44:11 +01:00
parent 42737c0a66
commit c918993060
6 changed files with 1027 additions and 33 deletions
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33
simulator_SIC_XE/src/instructions.cpp
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@ -73,6 +73,11 @@ void float_handler(Machine &m)
m.setF(static_cast<double>(m.getA()));
}
void norm_handler(Machine &m)
{
m.setF(normaliseFloat(m.getF()));
}
void addr_handler(Machine &m, int r1, int r2)
{
m.setReg(r2, m.getReg(r1) + m.getReg(r2));
@ -303,6 +308,14 @@ void or_handler(Machine &m, int ea, AddressingMode mode)
m.setA(m.getA() | val);
}
void rd_handler(Machine &m, int ea, AddressingMode mode)
{
int deviceNum = resolveWordOperand(m, ea, mode);
Device& device = m.getDevice(deviceNum);
// Load byte into rightmost byte of A register
m.setA((m.getA() & 0xFFFF00) | device.read());
}
void rsub_handler(Machine &m, int ea, AddressingMode mode)
{
m.setPC(m.getL());
@ -372,6 +385,18 @@ void subf_handler(Machine &m, int ea, AddressingMode mode)
m.setF(m.getF() - val);
}
void td_handler(Machine &m, int ea, AddressingMode mode)
{
int deviceNum = resolveWordOperand(m, ea, mode);
Device& device = m.getDevice(deviceNum);
// Test device and set SW accordingly
if (device.test()) {
m.setSW(setCC(m.getSW(), CC_EQ));
} else {
m.setSW(setCC(m.getSW(), CC_LT));
}
}
void tix_handler(Machine &m, int ea, AddressingMode mode)
{
m.setX(m.getX() + 1);
@ -379,3 +404,11 @@ void tix_handler(Machine &m, int ea, AddressingMode mode)
int memVal = resolveWordOperand(m, ea, mode);
m.setSW(sic_comp(valX, memVal, m.getSW()));
}
void wd_handler(Machine &m, int ea, AddressingMode mode)
{
int deviceNum = resolveWordOperand(m, ea, mode);
Device& device = m.getDevice(deviceNum);
// Write rightmost byte of A register to device
device.write(static_cast<unsigned char>(m.getA() & 0xFF));
}

8
simulator_SIC_XE/src/opcode.cpp
View file

@ -38,9 +38,9 @@ void loadInstructionSet()
instructions[MUL] = {"MUL", InstructionType::TYPE3_4, reinterpret_cast<RawHandler>(mul_handler)};
instructions[MULF] = {"MULF", InstructionType::TYPE3_4, reinterpret_cast<RawHandler>(mulf_handler)};
instructions[MULR] = {"MULR", InstructionType::TYPE2, reinterpret_cast<RawHandler>(mulr_handler)};
instructions[NORM] = {"NORM", InstructionType::TYPE1, nullptr};
instructions[NORM] = {"NORM", InstructionType::TYPE1, reinterpret_cast<RawHandler>(norm_handler)};
instructions[OR] = {"OR", InstructionType::TYPE3_4, reinterpret_cast<RawHandler>(or_handler)};
instructions[RD] = {"RD", InstructionType::TYPE3_4, nullptr};
instructions[RD] = {"RD", InstructionType::TYPE3_4, reinterpret_cast<RawHandler>(rd_handler)};
instructions[RMO] = {"RMO", InstructionType::TYPE2, reinterpret_cast<RawHandler>(rmo_handler)};
instructions[RSUB] = {"RSUB", InstructionType::TYPE3_4, reinterpret_cast<RawHandler>(rsub_handler)};
instructions[SHIFTL] = {"SHIFTL", InstructionType::TYPE2, reinterpret_cast<RawHandler>(shiftl_handler)};
@ -62,10 +62,10 @@ void loadInstructionSet()
instructions[SUBR] = {"SUBR", InstructionType::TYPE2, reinterpret_cast<RawHandler>(subr_handler)};
instructions[SVC] = {"SVC", InstructionType::TYPE2, reinterpret_cast<RawHandler>(svc_handler)};
instructions[TIXR] = {"TIXR", InstructionType::TYPE2, reinterpret_cast<RawHandler>(tixr_handler)};
instructions[TD] = {"TD", InstructionType::TYPE3_4, nullptr};
instructions[TD] = {"TD", InstructionType::TYPE3_4, reinterpret_cast<RawHandler>(td_handler)};
instructions[TIX] = {"TIX", InstructionType::TYPE3_4, reinterpret_cast<RawHandler>(tix_handler)};
instructions[TIO] = {"TIO", InstructionType::TYPE1, nullptr};
instructions[WD] = {"WD", InstructionType::TYPE3_4, nullptr};
instructions[WD] = {"WD", InstructionType::TYPE3_4, reinterpret_cast<RawHandler>(wd_handler)};
// Mark uninitialized opcodes as INVALID
for (int i = 0; i < 0xff; ++i) {