merged
This commit is contained in:
zanostro
parent
18a14d204c
commit
717568b6d0
30 changed files with 4093 additions and 209 deletions
52
simulator_SIC_XE/include/constants.h
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52
simulator_SIC_XE/include/constants.h
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@ -0,0 +1,52 @@
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#ifndef CONSTANTS_H
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#define CONSTANTS_H
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#include <string>
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// ==============================
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// SIC/XE Architecture Constants
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// ==============================
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// Memory and system constants
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constexpr int MEMORY_SIZE = 1 << 20; // 1 MB memory
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constexpr int NUM_DEVICES = 256;
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constexpr int WORD_SIZE = 24;
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constexpr int WORD_MASK = 0xFFFFFF;
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// SIC/XE floating point constants
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constexpr int SICF_BITS = 48;
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constexpr int SICF_FRAC_BITS = 40;
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constexpr int SICF_EXP_BITS = 7;
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constexpr int SICF_EXP_BIAS = 64;
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constexpr unsigned long long SICF_FRAC_MASK = (1ULL << SICF_FRAC_BITS) - 1;
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// SW register condition codes
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constexpr int CC_LT = 0x0; // 00
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constexpr int CC_EQ = 0x1; // 01
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constexpr int CC_GT = 0x2; // 10
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constexpr int CC_MASK = 0x3; // mask for 2 bits
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// Instruction format bit masks
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constexpr int TYPE3_4_SIC_MASK = 0xFC;
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constexpr int NI_MASK = 0x03; // mask for n and i bits
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constexpr int NI_SIC = 0x0;
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constexpr int BP_BASE_REL_MASK = 0b10;
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constexpr int BP_PC_REL_MASK = 0b01;
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constexpr int BP_DIRECT_MASK = 0b00;
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constexpr int BIT_E_MASK = 0x10; // mask for e bit in F4 and F3 instructions
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//SIC/XE/XE
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constexpr bool USE_EXTENDED_MODE = true;
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constexpr int VECTOR_REG_SIZE = 4;
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/* if structure is
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/target/
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|-> bin/simulator_exec
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|-> res/
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*/
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// When running from project root (./target/bin/simulator_exec), resources are in ./target/res/
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constexpr char PATH_RESOURCES[] = "./target/res/";
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constexpr bool FILE_CONTAINS_WHITE_SPACES = true;
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#endif // CONSTANTS_H
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@ -13,7 +13,11 @@ public:
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void write(unsigned char value) override;
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private:
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void ensureFileOpen();
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std::fstream fileStream;
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std::string filename;
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bool fileCreated;
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std::streampos readPosition;
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};
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#endif // FILE_DEVICE_H
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25
simulator_SIC_XE/include/file_reader.h
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25
simulator_SIC_XE/include/file_reader.h
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@ -0,0 +1,25 @@
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#ifndef FILE_READER_H
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#define FILE_READER_H
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#include "reader.h"
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#include <string>
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#include <fstream>
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class FileReader : public Reader {
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public:
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explicit FileReader(const std::string &path, std::ios::openmode m = std::ios::binary);
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~FileReader() override;
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int readByte() override;
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bool readBytes(uint8_t* buf, size_t len) override;
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std::string readString(size_t len) override;
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std::string readLine() override;
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bool good() const;
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private:
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std::ifstream in;
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};
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#endif // FILE_READER_H
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@ -1,11 +1,26 @@
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#ifndef INSTRUCTIONS_H
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#define INSTRUCTIONS_H
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#include "opcode.h"
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#include "utils.h"
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class Machine; // forward declaration
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// Type 1 instruction handlers
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void fix_handler(Machine& m);
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void float_handler(Machine& m);
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void hio_handler(Machine& m);
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void norm_handler(Machine& m);
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void sio_handler(Machine& m);
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void tio_handler(Machine& m);
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void nop_handler(Machine& m);
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/* IDEJE ZA SIC_XE_XE :)*/
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// void nop(Machine& m);
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// Type 2 instruction handlers
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void addr_handler(Machine& m, int r1, int r2);
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void clear_handler(Machine& m, int r, int unused);
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void compr_handler(Machine& m, int r1, int r2);
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void divr_handler(Machine& m, int r1, int r2);
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void mulr_handler(Machine& m, int r1, int r2);
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void rmo_handler(Machine& m, int r1, int r2);
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@ -16,5 +31,71 @@ void svc_handler(Machine& m, int n, int unused);
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void tixr_handler(Machine& m, int r1, int unused);
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// Type 3/4 instruction handlers
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void add_handler(Machine& m, int ea, AddressingMode mode);
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void addf_handler(Machine& m, int ea, AddressingMode mode);
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void and_handler(Machine& m, int ea, AddressingMode mode);
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void comp_handler(Machine& m, int ea, AddressingMode mode);
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void compf_handler(Machine& m, int ea, AddressingMode mode);
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void div_handler(Machine& m, int ea, AddressingMode mode);
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void divf_handler(Machine& m, int ea, AddressingMode mode);
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void j_handler(Machine& m, int ea, AddressingMode mode);
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void jeq_handler(Machine& m, int ea, AddressingMode mode);
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void jgt_handler(Machine& m, int ea, AddressingMode mode);
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void jlt_handler(Machine& m, int ea, AddressingMode mode);
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void jsub_handler(Machine& m, int ea, AddressingMode mode);
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void lda_handler(Machine& m, int ea, AddressingMode mode);
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void ldb_handler(Machine& m, int ea, AddressingMode mode);
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void ldch_handler(Machine& m, int ea, AddressingMode mode);
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void ldf_handler(Machine& m, int ea, AddressingMode mode);
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void ldl_handler(Machine& m, int ea, AddressingMode mode);
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void lds_handler(Machine& m, int ea, AddressingMode mode);
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void ldt_handler(Machine& m, int ea, AddressingMode mode);
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void ldx_handler(Machine& m, int ea, AddressingMode mode);
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void lps_handler(Machine& m, int ea, AddressingMode mode);
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void mul_handler(Machine& m, int ea, AddressingMode mode);
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void mulf_handler(Machine& m, int ea, AddressingMode mode);
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void or_handler(Machine& m, int ea, AddressingMode mode);
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void rd_handler(Machine& m, int ea, AddressingMode mode);
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void rsub_handler(Machine& m, int ea, AddressingMode mode);
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void ssk_handler(Machine& m, int ea, AddressingMode mode);
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void sta_handler(Machine& m, int ea, AddressingMode mode);
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void stb_handler(Machine& m, int ea, AddressingMode mode);
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void stch_handler(Machine& m, int ea, AddressingMode mode);
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void stf_handler(Machine& m, int ea, AddressingMode mode);
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void sti_handler(Machine& m, int ea, AddressingMode mode);
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void stl_handler(Machine& m, int ea, AddressingMode mode);
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void sts_handler(Machine& m, int ea, AddressingMode mode);
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void stsw_handler(Machine& m, int ea, AddressingMode mode);
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void stt_handler(Machine& m, int ea, AddressingMode mode);
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void stx_handler(Machine& m, int ea, AddressingMode mode);
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void sub_handler(Machine& m, int ea, AddressingMode mode);
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void subf_handler(Machine& m, int ea, AddressingMode mode);
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void td_handler(Machine& m, int ea, AddressingMode mode);
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void tix_handler(Machine& m, int ea, AddressingMode mode);
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void wd_handler(Machine& m, int ea, AddressingMode mode);
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// SIC/XE/XE Extended instruction handlers
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void xexe_handler(Machine& m);
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void halt_handler(Machine& m);
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void nop_handler(Machine& m);
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void vaddr_handler(Machine& m, int r1, int r2);
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void vsubr_handler(Machine& m, int r1, int r2);
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void vmulr_handler(Machine& m, int r1, int r2);
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void vdivr_handler(Machine& m, int r1, int r2);
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void vadd_handler(Machine& m, int ea, AddressingMode mode);
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void vsub_handler(Machine& m, int ea, AddressingMode mode);
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void vmul_handler(Machine& m, int ea, AddressingMode mode);
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void vdiv_handler(Machine& m, int ea, AddressingMode mode);
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void stva_handler(Machine& m, int ea, AddressingMode mode);
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void stvs_handler(Machine& m, int ea, AddressingMode mode);
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void stvt_handler(Machine& m, int ea, AddressingMode mode);
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void ldva_handler(Machine& m, int ea, AddressingMode mode);
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void ldvs_handler(Machine& m, int ea, AddressingMode mode);
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void ldvt_handler(Machine& m, int ea, AddressingMode mode);
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#endif // INSTRUCTIONS_H
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68
simulator_SIC_XE/include/loader.h
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68
simulator_SIC_XE/include/loader.h
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#ifndef LOADER_H
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#define LOADER_H
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#include <memory>
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#include <string>
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#include <vector>
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#include "file_reader.h"
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#include <stdexcept>
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class Machine;
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using std::shared_ptr;
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using std::string;
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class Loader {
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public:
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Loader( shared_ptr<Machine> machine, string filename) : _machine(machine), _filename(filename) {
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_file_reader = std::make_shared<FileReader>(filename, std::ios::in);
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if (!_file_reader->good()) {
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throw std::runtime_error("Loader: failed to open file: " + filename);
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}
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}
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~Loader();
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enum class RecordType {
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HEADER,
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TEXT,
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END,
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UNKNOWN
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};
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struct HeaderMetadata {
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string program_name;
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int start_address;
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int length;
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};
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struct TextRecord {
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int start_address;
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std::vector<uint8_t> data;
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};
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struct EndRecord {
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int execution_start_address;
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};
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void load();
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private :
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static RecordType parseRecordType(char c);
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shared_ptr<Machine> _machine;
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string _filename;
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shared_ptr<FileReader> _file_reader;
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HeaderMetadata readHeader();
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TextRecord readTextRecord();
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EndRecord readEndRecord();
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bool load_into_memory(int start_address, const std::vector<uint8_t>& data);
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};
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#endif // LOADER_H
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#include <string>
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#include <iostream>
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#include <vector>
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#include <memory>
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#include <atomic>
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#include <mutex>
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#include "constants.h"
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#include "device.h"
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#include "input_device.h"
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#include "output_device.h"
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#include "file_device.h"
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#include "opcode.h"
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#include <memory>
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#define MEMORY_SIZE 65536
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#define NUM_DEVICES 256
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#include "utils.h"
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using std::string;
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using std::cerr;
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class Machine {
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public:
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Machine();
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Machine(int speedHz) : Machine() { this->speedHz = speedHz; _instructionsTable = instructions; }
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~Machine();
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// Accessor methods for registers
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int getA() const { return A; }
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void setA(int value) { A = value; }
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void setA(int value) { A = toSIC24(value); }
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int getB() const { return B; }
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void setB(int value) { B = value; }
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void setB(int value) { B = toSIC24(value); }
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int getX() const { return X; }
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void setX(int value) { X = value; }
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void setX(int value) { X = toSIC24(value); }
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int getL() const { return L; }
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void setL(int value) { L = value; }
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void setL(int value) { L = toSIC24(value); }
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int getS() const { return S; }
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void setS(int value) { S = value; }
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void setS(int value) { S = toSIC24(value); }
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int getT() const { return T; }
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void setT(int value) { T = value; }
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void setT(int value) { T = toSIC24(value); }
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// PC is an address → don't mask to 24 unless you want 24-bit addressing
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int getPC() const { return PC; }
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void setPC(int value) { PC = value; }
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// status word: keep as-is
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int getSW() const { return SW; }
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void setSW(int value) { SW = value; }
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// Set a file device at index `num` using the provided filename.
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void setFileDevice(int num, const std::string &filename);
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// Fetch and execute instructions
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int fetch();
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void execute();
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bool execF1(int opcode);
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bool execF2(int opcode, int operand);
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bool execSICF3F4(int opcode, int ni, int operand);
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// Execution and speed control
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int getSpeed() const;
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void setSpeed(int Hz);
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void start();
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void stop();
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void tick();
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void halt();
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bool isStopped() const { return _stopped; }
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void reset();
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// error handling methods
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void notImplemented(string mnemonic);
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void divisionByZero(int opcode);
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void undefinedHandler(int opcode);
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bool getExtendedMode() const { return _exex_mode; }
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void enableExtendedMode();
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void disableExtendedMode();
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int* getVectorRegister(int regNum);
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void setVectorRegister(int regNum, const int* values);
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const int* getVA() const { return VA; }
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const int* getVS() const { return VS; }
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const int* getVT() const { return VT; }
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void setVA(const int* values);
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void setVS(const int* values);
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void setVT(const int* values);
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private:
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// registers
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int A, B, X, L, S, T, PC, SW;
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@ -104,42 +127,23 @@ private:
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std::vector<std::shared_ptr<Device>> devices;
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// fallback device returned when device slot is empty/invalid
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Device fallbackDevice;
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// Execution control
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std::atomic<bool> running{false};
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std::atomic<int> speedHz{10}; // Default 10 Hz
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bool execF1(int opcode);
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bool execF2(int opcode, int operand);
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bool execSICF3F4(int opcode, int ni, int x, int b, int p, int e, int operand);
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// Extended mode
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bool _stopped{false};
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bool _exex_mode{false};
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InstructionInfo* _instructionsTable;
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int VA[VECTOR_REG_SIZE], VS[VECTOR_REG_SIZE], VT[VECTOR_REG_SIZE]; // vector operation registers
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};
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// Convert integer to 24-bit signed SIC representation
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inline int toSIC24(int value) {
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value &= 0xFFFFFF;
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if (value & 0x800000) {
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value -= 0x1000000;
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}
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return value;
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}
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inline int setCC(int sw, int cc) {
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sw &= ~CC_MASK;
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sw |= (cc & CC_MASK);
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return sw;
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}
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inline int sic_comp(int a, int b, int sw) {
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int sa = toSIC24(a);
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int sb = toSIC24(b);
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int cc;
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if (sa < sb) {
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cc = CC_LT;
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} else if (sa == sb) {
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cc = CC_EQ;
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} else {
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cc = CC_GT;
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}
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return setCC(sw, cc);
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}
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inline int getCC(int sw) {
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return sw & CC_MASK;
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}
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#endif // MACHINE_H
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@ -1,6 +1,8 @@
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#ifndef OPCODE_H
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#define OPCODE_H
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#include "utils.h"
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// ==============================
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// Opcode definitions (SIC/XE)
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// ==============================
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@ -64,13 +66,26 @@
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#define TIXR 0xB8
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#define WD 0xDC
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// SW register condition codes
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constexpr int CC_LT = 0x0; // 00
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constexpr int CC_EQ = 0x1; // 01
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constexpr int CC_GT = 0x2; // 10
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constexpr int CC_MASK = 0x3; // mask for 2 bits
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// ==============================
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// Extended opcodes (SIC/XE/XE)
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// ==============================
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#define NOP 0xF1
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#define HALT 0xF2
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#define XEXE 0xEE // Enable extended mode
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#define VADD 0x18
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#define VADDR 0x90
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#define VSUB 0x1C
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#define VSUBR 0x94
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#define VMUL 0x20
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#define VMULR 0x98
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#define VDIV 0x24
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#define VDIVR 0x9C
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#define STVA 0x0C
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#define STVS 0x7C
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#define STVT 0x84
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||||
#define LDVA 0x00
|
||||
#define LDVS 0x68
|
||||
#define LDVT 0x04
|
||||
|
||||
|
||||
|
||||
|
|
@ -93,6 +108,7 @@ struct InstructionInfo {
|
|||
};
|
||||
|
||||
extern InstructionInfo instructions[];
|
||||
extern InstructionInfo instructionsEXEX[];
|
||||
|
||||
// Initialize the instruction table
|
||||
void loadInstructionSet();
|
||||
|
|
|
|||
21
simulator_SIC_XE/include/reader.h
Normal file
21
simulator_SIC_XE/include/reader.h
Normal file
|
|
@ -0,0 +1,21 @@
|
|||
#ifndef READER_H
|
||||
#define READER_H
|
||||
|
||||
#include <string>
|
||||
#include <cstdint>
|
||||
|
||||
// Abstract Reader class: read bytes/strings from a source (file, string, etc.)
|
||||
class Reader {
|
||||
public:
|
||||
virtual ~Reader() = default;
|
||||
// return 0..255 on success, -1 on EOF/error
|
||||
virtual int readByte() = 0;
|
||||
// read exactly len bytes into buf; return true on success
|
||||
virtual bool readBytes(uint8_t* buf, size_t len) = 0;
|
||||
// read up to len bytes into a std::string; may return shorter string on EOF
|
||||
virtual std::string readString(size_t len) = 0;
|
||||
// read a line (up to newline), return empty string on EOF
|
||||
virtual std::string readLine() = 0;
|
||||
};
|
||||
|
||||
#endif // READER_H
|
||||
22
simulator_SIC_XE/include/string_reader.h
Normal file
22
simulator_SIC_XE/include/string_reader.h
Normal file
|
|
@ -0,0 +1,22 @@
|
|||
#ifndef STRING_READER_H
|
||||
#define STRING_READER_H
|
||||
|
||||
#include "reader.h"
|
||||
#include <string>
|
||||
#include <sstream>
|
||||
|
||||
class StringReader : public Reader {
|
||||
public:
|
||||
explicit StringReader(const std::string &s);
|
||||
~StringReader() override;
|
||||
|
||||
int readByte() override;
|
||||
bool readBytes(uint8_t* buf, size_t len) override;
|
||||
std::string readString(size_t len) override;
|
||||
std::string readLine() override;
|
||||
|
||||
private:
|
||||
std::istringstream in;
|
||||
};
|
||||
|
||||
#endif // STRING_READER_H
|
||||
95
simulator_SIC_XE/include/utils.h
Normal file
95
simulator_SIC_XE/include/utils.h
Normal file
|
|
@ -0,0 +1,95 @@
|
|||
#ifndef UTILS_H
|
||||
#define UTILS_H
|
||||
|
||||
#include "constants.h"
|
||||
|
||||
#include <cmath>
|
||||
|
||||
// ==============================
|
||||
// SIC/XE Utility Functions
|
||||
// ==============================
|
||||
|
||||
// Instruction bit extraction utilities
|
||||
inline int getXBit(int b2) {
|
||||
return (b2 & 0x80) ? 1 : 0;
|
||||
}
|
||||
|
||||
inline int getBPBits(int b2) {
|
||||
return (b2 >> 5) & 0x03;
|
||||
}
|
||||
|
||||
enum class AddressingMode {
|
||||
IMMEDIATE,
|
||||
INDIRECT,
|
||||
SIMPLE,
|
||||
SIC_DIRECT,
|
||||
INVALID
|
||||
};
|
||||
|
||||
// Get addressing mode from ni bits
|
||||
AddressingMode getAddressingMode(int ni);
|
||||
|
||||
|
||||
// convert to signed 24-bit integer
|
||||
inline int toSIC24(int value) {
|
||||
value &= 0xFFFFFF;
|
||||
if (value & 0x800000) {
|
||||
value -= 0x1000000;
|
||||
}
|
||||
return value;
|
||||
}
|
||||
|
||||
inline int setCC(int sw, int cc) {
|
||||
sw &= ~CC_MASK;
|
||||
sw |= (cc & CC_MASK);
|
||||
return sw;
|
||||
}
|
||||
|
||||
inline int sic_comp(int a, int b, int sw) {
|
||||
int sa = toSIC24(a);
|
||||
int sb = toSIC24(b);
|
||||
|
||||
int cc;
|
||||
if (sa < sb) {
|
||||
cc = CC_LT;
|
||||
} else if (sa == sb) {
|
||||
cc = CC_EQ;
|
||||
} else {
|
||||
cc = CC_GT;
|
||||
}
|
||||
|
||||
return setCC(sw, cc);
|
||||
}
|
||||
|
||||
inline int sic_comp(double a, double b, int sw) {
|
||||
int cc;
|
||||
if (a < b) {
|
||||
cc = CC_LT;
|
||||
} else if (a == b) {
|
||||
cc = CC_EQ;
|
||||
} else {
|
||||
cc = CC_GT;
|
||||
}
|
||||
|
||||
return setCC(sw, cc);
|
||||
}
|
||||
|
||||
|
||||
inline int getCC(int sw) {
|
||||
return sw & CC_MASK;
|
||||
}
|
||||
|
||||
inline double normaliseFloat(double value)
|
||||
{
|
||||
if (value == 0.0 )return 0.0;
|
||||
if (!std::isfinite(value)) return value;
|
||||
double mantissa = value;
|
||||
while (std::fabs(mantissa) >= 10.0) mantissa /= 10.0;
|
||||
while (std::fabs(mantissa) < 1.0) mantissa *= 10.0;
|
||||
return mantissa;
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
#endif // UTILS_H
|
||||
Loading…
Add table
Add a link
Reference in a new issue