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aljazbrodar. 2025-11-14 16:50:02 +01:00
parent a0a6fc7a5e
commit 4c8c1fb47e
2 changed files with 23 additions and 5 deletions
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22
ass1/bonus/dijkstra.asm
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@ -28,8 +28,7 @@ FOR1 LDA PROV, X . nalozi potencialno razdaljo sosednjega vozlisca v okol
JGT NEXT JGT NEXT
SET RMO X, S . S nastavi na ix vozlisca - trenutna iteracija SET RMO X, S . S nastavi na ix vozlisca - trenutna iteracija
NEXT CLEAR T NEXT TIX INPUT_V
TIX INPUT_V
J FOR1 J FOR1
. ce ni vec vozlisc v okolici koncaj . ce ni vec vozlisc v okolici koncaj
RMO S, A RMO S, A
@ -41,13 +40,26 @@ NEXT CLEAR T
LDA #-2 LDA #-2
STA PROV, X STA PROV, X
.nato dodaj vozlisca v okolico oz. posodobi razdalje obstojecih vozlisc v okolici .nato dodaj vozlisca v okolico oz. posodobi razdalje obstojecih vozlisc v okolici
LDX #0 LDX #0 . stevec na 0
FOR2 LDA INPUT_X, X FOR2 LDA INPUT_X, X . preveri ali je to povezava ki izvira v vozl. S
COMPR A, S COMPR A, S
JGT NEXT2 . ce ni preskoci
JLT NEXT2
.sicer preveri ali je vozlisce neobiskano
LDA PROV, X
CMP #-1
JGT NEXT2 JGT NEXT2
JLT NEXT2 JLT NEXT2
STA old_X . zacasno zamenjaj vrednost X
LDX INPUT_Y, X
LDA D, X .nalozi D[Y] v A
RMO A, T .zacasno shrani v T
LDA INPUT_W, X
ADDR T, A
STA prov, X . prov[Y] = D[S] + W
RMO A, X
NEXT2 TIX INPUT_V NEXT2 TIX INPUT_V
J FOR2 J FOR2
. J ZA WHILE?! . J ZA WHILE?!

6
ass1/bonus/test.asm Normal file
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@ -0,0 +1,6 @@
test START 0
LDA #-1
LDS #2
RMO S, A
halt J halt
END test